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Microchip MPLAB X – Link Error: region is full / section overlaps section

While trying to compile some code on MPLAB X I came across this link error, stating that my #pragma config bits were full or sections of them were overlapping other sections.

/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link Error: region FOSC is full (dist/default/production/can_to_serial.production.elf section __FOSC)
/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link Error: region FWDT is full (dist/default/production/can_to_serial.production.elf section __FWDT)
/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link Error: region FBORPOR is full (dist/default/production/can_to_serial.production.elf section __FBORPOR)
/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link Error: section .config_MCLRE%10 [f80004   -> f80005  ] overlaps section __FWDT [f80004   -> f80005  ]
/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link Error: section .config_WDT%11 [f80002   -> f80003  ] overlaps section __FOSC [f80002   -> f80003  ]
/Applications/microchip/xc16/v1.11/bin/bin/../bin/elf-ld: Link terminated due to previous error(s).
make[2]: *** [dist/default/production/can_to_serial.production.hex] Error 255
make[1]: *** [.build-conf] Error 2
make: *** [.build-impl] Error 2

BUILD FAILED (exit value 2, total time: 1s)

After some time scratching my head I realised the issue was that configuration bits were being set twice. Simply I had to remove them. I also moved all configuration bits to a separate header which is only included in the main c source file to avoid future issues.

Code causing the error:

main.c
#include 
#include 
#include 

// FOSC
#pragma config FPR = XT_PLL4            // Primary Oscillator Mode (XT w/PLL 4x)
#pragma config FOS = PRI                // Oscillator Source (Primary Oscillator)
#pragma config FCKSMEN = CSW_FSCM_OFF   // Clock Switching and Monitor (Sw Disabled, Mon Disabled)

// FWDT
#pragma config FWPSB = WDTPSB_16        // WDT Prescaler B (1:16)
#pragma config FWPSA = WDTPSA_512       // WDT Prescaler A (1:512)
#pragma config WDT = WDT_OFF            // Watchdog Timer (Disabled)

// FBORPOR
#pragma config FPWRT = PWRT_64          // POR Timer Value (64ms)
#pragma config BODENV = BORV20          // Brown Out Voltage (Reserved)
#pragma config BOREN = PBOR_ON          // PBOR Enable (Enabled)
#pragma config LPOL = PWMxL_ACT_HI      // Low-side PWM Output Polarity (Active High)
#pragma config HPOL = PWMxH_ACT_HI      // High-side PWM Output Polarity (Active High)
#pragma config PWMPIN = RST_IOPIN       // PWM Output Pin Reset (Control with PORT/TRIS regs)
#pragma config MCLRE = MCLR_DIS         // Master Clear Enable (Disabled)

// FGS
#pragma config GWRP = GWRP_OFF          // General Code Segment Write Protect (Disabled)
#pragma config GCP = CODE_PROT_OFF      // General Segment Code Protection (Disabled)

// FICD
#pragma config ICS = ICS_PGD            // Comm Channel Select (Use PGC/EMUC and PGD/EMUD)

// Configuration settings
_FOSC(CSW_FSCM_OFF & FRC_PLL16); // Fosc=16x7.5MHz, Fcy=30MHz
_FWDT(WDT_OFF);                  // Watchdog timer off
_FBORPOR(MCLR_DIS);              // Disable reset pin

int main(){
// ... code continues here

Altered code:

main.c
#include 
#include 
#include "config.h"
#include 

int main(){
// ... code continues here
config.h
// FOSC
#pragma config FPR = XT_PLL4            // Primary Oscillator Mode (XT w/PLL 4x)
#pragma config FOS = PRI                // Oscillator Source (Primary Oscillator)
#pragma config FCKSMEN = CSW_FSCM_OFF   // Clock Switching and Monitor (Sw Disabled, Mon Disabled)

// FWDT
#pragma config FWPSB = WDTPSB_16        // WDT Prescaler B (1:16)
#pragma config FWPSA = WDTPSA_512       // WDT Prescaler A (1:512)
#pragma config WDT = WDT_OFF            // Watchdog Timer (Disabled)

// FBORPOR
#pragma config FPWRT = PWRT_64          // POR Timer Value (64ms)
#pragma config BODENV = BORV20          // Brown Out Voltage (Reserved)
#pragma config BOREN = PBOR_ON          // PBOR Enable (Enabled)
#pragma config LPOL = PWMxL_ACT_HI      // Low-side PWM Output Polarity (Active High)
#pragma config HPOL = PWMxH_ACT_HI      // High-side PWM Output Polarity (Active High)
#pragma config PWMPIN = RST_IOPIN       // PWM Output Pin Reset (Control with PORT/TRIS regs)
#pragma config MCLRE = MCLR_DIS         // Master Clear Enable (Disabled)

// FGS
#pragma config GWRP = GWRP_OFF          // General Code Segment Write Protect (Disabled)
#pragma config GCP = CODE_PROT_OFF      // General Segment Code Protection (Disabled)

// FICD
#pragma config ICS = ICS_PGD            // Comm Channel Select (Use PGC/EMUC and PGD/EMUD)